Synopsys has announced Ultra Ethernet and UALink IP solutions to meet the demand for high-bandwidth and low-latency HPC and AI accelerator interconnects.
The Ultra Ethernet IP solution will enable up to 1.6 Tbps of bandwidth to connect up to one million endpoints while the UALink (Ultra Accelerator Link) IP solution will offer up to 200 Gbps throughput per lane, linking up to 1,024 accelerators.
The Ultra Ethernet and UALink IP are built on Synopsys’ 1.6T Ethernet IP and PCIe 7.0 IP offerings which were released in February and June, respectively.
The Ultra Ethernet protocol provides a way of reducing tail latency in networks while the UALink offering is a scale-up protocol that will more than 1,000 accelerators to be connected together as one cluster.
Speaking to DCD ahead of the announcement, Priyank Shukla, principal product manager for interface IP at Synopsys said the IP includes the controller, the physical layer, and the verification IP making it the industry’s first complete solution.
“Both of these protocols, Ultra Ethernet and Ultra Accelerator Link, provide an open standard for connecting accelerators at a very large scale,” he said, explaining that by 2030, it's estimated that 70 percent of all compute will be for AI accelerator training.
“We really need efficient interconnects for that infrastructure and both of these protocols together provide very efficient, both power efficient and bandwidth efficient, and latency-sensitive interconnect technology for accelerator to accelerator networks.”
Synopsys says that to date, more than 5,000 customers have had successful tapeouts using its Ethernet and PCIe IP offerings and the company is collaborating with organizations including AMD, Astera Labs, Juniper Networks, Tenstorrent, and Xconn on these new technologies.
While today’s launch provides customers with 18 months to develop products that work with these protocols, Shukla said the technology is expected to support the requirements of AI accelerator interconnects until 2030.
“These devices will solve the problem for the next six years, although there could be some breakthroughs with respect to the model and maybe you'll be able to implement this more efficiently. [For now] this provides a roadmap, however, the next generation of these architects already planned… which will address the future needs as well.”
The Synopsys Ultra Ethernet IP solution, including MAC and PCS, PHY, and verification IP, is scheduled to be available in the first half of 2025. The Synopsys UALink IP solution, including controller, PHY, and verification IP, is scheduled to be available in the second half of 2025.
