Ayar Labs has unveiled the world’s first UCIe (Universal Chiplet Interconnect Express) optical interconnect chiplet.
Designed to support AI workloads, Ayar Labs said the offering will eliminate bottlenecks, maximizing artificial intelligence (AI) infrastructure performance and efficiency whilst reducing latency and power consumption.
The chiplet combines silicon photonics with CMOS manufacturing processes to support the use of optical interconnects in a chiplet form factor within multi-chip packages.
Powered by Ayar Labs’ 16-wavelength SuperNova light source, the offering is capable of achieving 8Tbps bandwidth. The company said its compatibility with the UCIe standard helps to create a more accessible, cost-effective ecosystem, streamlining the adoption of advanced optical technologies necessary to scale AI workloads while overcoming the limitations of traditional copper interconnects.
Launched in 2022 and co-developed by AMD, Arm, ASE Group, Google Cloud, Intel, Meta, Microsoft, Qualcomm, Samsung, and TSMC, UCIe is an open specification for the interconnect between chiplets within a package.
The UCIe 2.0 specification was released on August 6, 2024, and provides support for 3D packaging to enhance bandwidth density and power efficiency.
“Optical interconnects are needed to solve power density challenges in scale-up AI fabrics,” said Mark Wade, CEO and co-founder of Ayar Labs. “We recognized early on the potential for co-packaged optics, which positioned us to drive adoption of optical solutions in AI applications. As we continue to push the boundaries of optical technologies, we’re also bringing together the supply chain, manufacturing, and testing and validation processes needed for customers to deploy these solutions at scale.”
Elsewhere this week, Lightmatter launched its M1000 and L200 Passage photonic interconnects, which also use a standard interoperable UCIe die-to-die (D2D) interface to facilitate “scalable chiplet-based architectures to seamlessly integrate with next-generation XPUs and switches.”
